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Registers

registers

RV32I_INDEX_BY_NAME = _RV32I_X_INDEX_BY_NAME | _RV32I_ABI_INDEX_BY_NAME module-attribute

RV32F_INDEX_BY_NAME = _RV32F_F_INDEX_BY_NAME | _RV32F_ABI_INDEX_BY_NAME module-attribute

RDInvT = TypeVar('RDInvT', bound=RISCVRegisterType) module-attribute

RSInvT = TypeVar('RSInvT', bound=RISCVRegisterType) module-attribute

RS1InvT = TypeVar('RS1InvT', bound=RISCVRegisterType) module-attribute

RS2InvT = TypeVar('RS2InvT', bound=RISCVRegisterType) module-attribute

RISCVRegisterType dataclass

Bases: RegisterType, ABC

A RISC-V register type.

Source code in xdsl/dialects/riscv/registers.py 
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class RISCVRegisterType(RegisterType, ABC):
    """
    A RISC-V register type.
    """

    @classmethod
    @abstractmethod
    def a_register(cls, index: int) -> Self:
        raise NotImplementedError()

a_register(index: int) -> Self abstractmethod classmethod

Source code in xdsl/dialects/riscv/registers.py 
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@classmethod
@abstractmethod
def a_register(cls, index: int) -> Self:
    raise NotImplementedError()

IntRegisterType dataclass

Bases: RISCVRegisterType

A RISC-V register type.

Source code in xdsl/dialects/riscv/registers.py 
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@irdl_attr_definition
class IntRegisterType(RISCVRegisterType):
    """
    A RISC-V register type.
    """

    name = "riscv.reg"

    @classmethod
    def index_by_name(cls) -> dict[str, int]:
        return RV32I_INDEX_BY_NAME

    @classmethod
    def a_register(cls, index: int) -> IntRegisterType:
        return Registers.A[index]

    @classmethod
    def infinite_register_prefix(cls):
        return "j_"

    # This class variable is created and exclusively accessed in `abi_name_by_index`.
    # _ALLOCATABLE_REGISTERS: ClassVar[tuple[IntRegisterType, ...]]

    @classmethod
    def allocatable_registers(cls):
        if not hasattr(cls, "_ALLOCATABLE_REGISTERS"):
            cls._ALLOCATABLE_REGISTERS = (*Registers.T, *Registers.A)
        return cls._ALLOCATABLE_REGISTERS

name = 'riscv.reg' class-attribute instance-attribute

index_by_name() -> dict[str, int] classmethod

Source code in xdsl/dialects/riscv/registers.py 
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@classmethod
def index_by_name(cls) -> dict[str, int]:
    return RV32I_INDEX_BY_NAME

a_register(index: int) -> IntRegisterType classmethod

Source code in xdsl/dialects/riscv/registers.py 
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@classmethod
def a_register(cls, index: int) -> IntRegisterType:
    return Registers.A[index]

infinite_register_prefix() classmethod

Source code in xdsl/dialects/riscv/registers.py 
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@classmethod
def infinite_register_prefix(cls):
    return "j_"

allocatable_registers() classmethod

Source code in xdsl/dialects/riscv/registers.py 
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@classmethod
def allocatable_registers(cls):
    if not hasattr(cls, "_ALLOCATABLE_REGISTERS"):
        cls._ALLOCATABLE_REGISTERS = (*Registers.T, *Registers.A)
    return cls._ALLOCATABLE_REGISTERS

FloatRegisterType dataclass

Bases: RISCVRegisterType

A RISC-V register type.

Source code in xdsl/dialects/riscv/registers.py 
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@irdl_attr_definition
class FloatRegisterType(RISCVRegisterType):
    """
    A RISC-V register type.
    """

    name = "riscv.freg"

    @classmethod
    def index_by_name(cls) -> dict[str, int]:
        return RV32F_INDEX_BY_NAME

    @classmethod
    def a_register(cls, index: int) -> FloatRegisterType:
        return Registers.FA[index]

    @classmethod
    def infinite_register_prefix(cls):
        return "fj_"

    # This class variable is created and exclusively accessed in `abi_name_by_index`.
    # _ALLOCATABLE_REGISTERS: ClassVar[tuple[FloatRegisterType, ...]]

    @classmethod
    def allocatable_registers(cls):
        if not hasattr(cls, "_ALLOCATABLE_REGISTERS"):
            cls._ALLOCATABLE_REGISTERS = (*Registers.FT, *Registers.FA)
        return cls._ALLOCATABLE_REGISTERS

name = 'riscv.freg' class-attribute instance-attribute

index_by_name() -> dict[str, int] classmethod

Source code in xdsl/dialects/riscv/registers.py 
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@classmethod
def index_by_name(cls) -> dict[str, int]:
    return RV32F_INDEX_BY_NAME

a_register(index: int) -> FloatRegisterType classmethod

Source code in xdsl/dialects/riscv/registers.py 
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@classmethod
def a_register(cls, index: int) -> FloatRegisterType:
    return Registers.FA[index]

infinite_register_prefix() classmethod

Source code in xdsl/dialects/riscv/registers.py 
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@classmethod
def infinite_register_prefix(cls):
    return "fj_"

allocatable_registers() classmethod

Source code in xdsl/dialects/riscv/registers.py 
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@classmethod
def allocatable_registers(cls):
    if not hasattr(cls, "_ALLOCATABLE_REGISTERS"):
        cls._ALLOCATABLE_REGISTERS = (*Registers.FT, *Registers.FA)
    return cls._ALLOCATABLE_REGISTERS

Registers

Bases: ABC

Namespace for named register constants.

Source code in xdsl/dialects/riscv/registers.py 
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class Registers(ABC):
    """Namespace for named register constants."""

    UNALLOCATED_INT = IntRegisterType.unallocated()
    ZERO = IntRegisterType.from_name("zero")
    RA = IntRegisterType.from_name("ra")
    SP = IntRegisterType.from_name("sp")
    GP = IntRegisterType.from_name("gp")
    TP = IntRegisterType.from_name("tp")
    T0 = IntRegisterType.from_name("t0")
    T1 = IntRegisterType.from_name("t1")
    T2 = IntRegisterType.from_name("t2")
    FP = IntRegisterType.from_name("fp")
    S0 = IntRegisterType.from_name("s0")
    S1 = IntRegisterType.from_name("s1")
    A0 = IntRegisterType.from_name("a0")
    A1 = IntRegisterType.from_name("a1")
    A2 = IntRegisterType.from_name("a2")
    A3 = IntRegisterType.from_name("a3")
    A4 = IntRegisterType.from_name("a4")
    A5 = IntRegisterType.from_name("a5")
    A6 = IntRegisterType.from_name("a6")
    A7 = IntRegisterType.from_name("a7")
    S2 = IntRegisterType.from_name("s2")
    S3 = IntRegisterType.from_name("s3")
    S4 = IntRegisterType.from_name("s4")
    S5 = IntRegisterType.from_name("s5")
    S6 = IntRegisterType.from_name("s6")
    S7 = IntRegisterType.from_name("s7")
    S8 = IntRegisterType.from_name("s8")
    S9 = IntRegisterType.from_name("s9")
    S10 = IntRegisterType.from_name("s10")
    S11 = IntRegisterType.from_name("s11")
    T3 = IntRegisterType.from_name("t3")
    T4 = IntRegisterType.from_name("t4")
    T5 = IntRegisterType.from_name("t5")
    T6 = IntRegisterType.from_name("t6")

    UNALLOCATED_FLOAT = FloatRegisterType.unallocated()
    FT0 = FloatRegisterType.from_name("ft0")
    FT1 = FloatRegisterType.from_name("ft1")
    FT2 = FloatRegisterType.from_name("ft2")
    FT3 = FloatRegisterType.from_name("ft3")
    FT4 = FloatRegisterType.from_name("ft4")
    FT5 = FloatRegisterType.from_name("ft5")
    FT6 = FloatRegisterType.from_name("ft6")
    FT7 = FloatRegisterType.from_name("ft7")
    FS0 = FloatRegisterType.from_name("fs0")
    FS1 = FloatRegisterType.from_name("fs1")
    FA0 = FloatRegisterType.from_name("fa0")
    FA1 = FloatRegisterType.from_name("fa1")
    FA2 = FloatRegisterType.from_name("fa2")
    FA3 = FloatRegisterType.from_name("fa3")
    FA4 = FloatRegisterType.from_name("fa4")
    FA5 = FloatRegisterType.from_name("fa5")
    FA6 = FloatRegisterType.from_name("fa6")
    FA7 = FloatRegisterType.from_name("fa7")
    FS2 = FloatRegisterType.from_name("fs2")
    FS3 = FloatRegisterType.from_name("fs3")
    FS4 = FloatRegisterType.from_name("fs4")
    FS5 = FloatRegisterType.from_name("fs5")
    FS6 = FloatRegisterType.from_name("fs6")
    FS7 = FloatRegisterType.from_name("fs7")
    FS8 = FloatRegisterType.from_name("fs8")
    FS9 = FloatRegisterType.from_name("fs9")
    FS10 = FloatRegisterType.from_name("fs10")
    FS11 = FloatRegisterType.from_name("fs11")
    FT8 = FloatRegisterType.from_name("ft8")
    FT9 = FloatRegisterType.from_name("ft9")
    FT10 = FloatRegisterType.from_name("ft10")
    FT11 = FloatRegisterType.from_name("ft11")

    # register classes:

    A = (A0, A1, A2, A3, A4, A5, A6, A7)
    T = (T0, T1, T2, T3, T4, T5, T6)
    S = (S0, S1, S2, S3, S4, S5, S6, S7, S8, S9, S10, S11)

    FA = (FA0, FA1, FA2, FA3, FA4, FA5, FA6, FA7)
    FT = (FT0, FT1, FT2, FT3, FT4, FT5, FT6, FT7, FT8, FT9, FT10, FT11)
    FS = (FS0, FS1, FS2, FS3, FS4, FS5, FS6, FS7, FS8, FS9, FS10, FS11)

UNALLOCATED_INT = IntRegisterType.unallocated() class-attribute instance-attribute

ZERO = IntRegisterType.from_name('zero') class-attribute instance-attribute

RA = IntRegisterType.from_name('ra') class-attribute instance-attribute

SP = IntRegisterType.from_name('sp') class-attribute instance-attribute

GP = IntRegisterType.from_name('gp') class-attribute instance-attribute

TP = IntRegisterType.from_name('tp') class-attribute instance-attribute

T0 = IntRegisterType.from_name('t0') class-attribute instance-attribute

T1 = IntRegisterType.from_name('t1') class-attribute instance-attribute

T2 = IntRegisterType.from_name('t2') class-attribute instance-attribute

FP = IntRegisterType.from_name('fp') class-attribute instance-attribute

S0 = IntRegisterType.from_name('s0') class-attribute instance-attribute

S1 = IntRegisterType.from_name('s1') class-attribute instance-attribute

A0 = IntRegisterType.from_name('a0') class-attribute instance-attribute

A1 = IntRegisterType.from_name('a1') class-attribute instance-attribute

A2 = IntRegisterType.from_name('a2') class-attribute instance-attribute

A3 = IntRegisterType.from_name('a3') class-attribute instance-attribute

A4 = IntRegisterType.from_name('a4') class-attribute instance-attribute

A5 = IntRegisterType.from_name('a5') class-attribute instance-attribute

A6 = IntRegisterType.from_name('a6') class-attribute instance-attribute

A7 = IntRegisterType.from_name('a7') class-attribute instance-attribute

S2 = IntRegisterType.from_name('s2') class-attribute instance-attribute

S3 = IntRegisterType.from_name('s3') class-attribute instance-attribute

S4 = IntRegisterType.from_name('s4') class-attribute instance-attribute

S5 = IntRegisterType.from_name('s5') class-attribute instance-attribute

S6 = IntRegisterType.from_name('s6') class-attribute instance-attribute

S7 = IntRegisterType.from_name('s7') class-attribute instance-attribute

S8 = IntRegisterType.from_name('s8') class-attribute instance-attribute

S9 = IntRegisterType.from_name('s9') class-attribute instance-attribute

S10 = IntRegisterType.from_name('s10') class-attribute instance-attribute

S11 = IntRegisterType.from_name('s11') class-attribute instance-attribute

T3 = IntRegisterType.from_name('t3') class-attribute instance-attribute

T4 = IntRegisterType.from_name('t4') class-attribute instance-attribute

T5 = IntRegisterType.from_name('t5') class-attribute instance-attribute

T6 = IntRegisterType.from_name('t6') class-attribute instance-attribute

UNALLOCATED_FLOAT = FloatRegisterType.unallocated() class-attribute instance-attribute

FT0 = FloatRegisterType.from_name('ft0') class-attribute instance-attribute

FT1 = FloatRegisterType.from_name('ft1') class-attribute instance-attribute

FT2 = FloatRegisterType.from_name('ft2') class-attribute instance-attribute

FT3 = FloatRegisterType.from_name('ft3') class-attribute instance-attribute

FT4 = FloatRegisterType.from_name('ft4') class-attribute instance-attribute

FT5 = FloatRegisterType.from_name('ft5') class-attribute instance-attribute

FT6 = FloatRegisterType.from_name('ft6') class-attribute instance-attribute

FT7 = FloatRegisterType.from_name('ft7') class-attribute instance-attribute

FS0 = FloatRegisterType.from_name('fs0') class-attribute instance-attribute

FS1 = FloatRegisterType.from_name('fs1') class-attribute instance-attribute

FA0 = FloatRegisterType.from_name('fa0') class-attribute instance-attribute

FA1 = FloatRegisterType.from_name('fa1') class-attribute instance-attribute

FA2 = FloatRegisterType.from_name('fa2') class-attribute instance-attribute

FA3 = FloatRegisterType.from_name('fa3') class-attribute instance-attribute

FA4 = FloatRegisterType.from_name('fa4') class-attribute instance-attribute

FA5 = FloatRegisterType.from_name('fa5') class-attribute instance-attribute

FA6 = FloatRegisterType.from_name('fa6') class-attribute instance-attribute

FA7 = FloatRegisterType.from_name('fa7') class-attribute instance-attribute

FS2 = FloatRegisterType.from_name('fs2') class-attribute instance-attribute

FS3 = FloatRegisterType.from_name('fs3') class-attribute instance-attribute

FS4 = FloatRegisterType.from_name('fs4') class-attribute instance-attribute

FS5 = FloatRegisterType.from_name('fs5') class-attribute instance-attribute

FS6 = FloatRegisterType.from_name('fs6') class-attribute instance-attribute

FS7 = FloatRegisterType.from_name('fs7') class-attribute instance-attribute

FS8 = FloatRegisterType.from_name('fs8') class-attribute instance-attribute

FS9 = FloatRegisterType.from_name('fs9') class-attribute instance-attribute

FS10 = FloatRegisterType.from_name('fs10') class-attribute instance-attribute

FS11 = FloatRegisterType.from_name('fs11') class-attribute instance-attribute

FT8 = FloatRegisterType.from_name('ft8') class-attribute instance-attribute

FT9 = FloatRegisterType.from_name('ft9') class-attribute instance-attribute

FT10 = FloatRegisterType.from_name('ft10') class-attribute instance-attribute

FT11 = FloatRegisterType.from_name('ft11') class-attribute instance-attribute

A = (A0, A1, A2, A3, A4, A5, A6, A7) class-attribute instance-attribute

T = (T0, T1, T2, T3, T4, T5, T6) class-attribute instance-attribute

S = (S0, S1, S2, S3, S4, S5, S6, S7, S8, S9, S10, S11) class-attribute instance-attribute

FA = (FA0, FA1, FA2, FA3, FA4, FA5, FA6, FA7) class-attribute instance-attribute

FT = (FT0, FT1, FT2, FT3, FT4, FT5, FT6, FT7, FT8, FT9, FT10, FT11) class-attribute instance-attribute

FS = (FS0, FS1, FS2, FS3, FS4, FS5, FS6, FS7, FS8, FS9, FS10, FS11) class-attribute instance-attribute

is_non_zero(reg: IntRegisterType) -> bool

Returns True if the register is allocated, and is not the x0/ZERO register.

Source code in xdsl/dialects/riscv/registers.py 
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def is_non_zero(reg: IntRegisterType) -> bool:
    """
    Returns True if the register is allocated, and is not the x0/ZERO register.
    """
    return (
        reg.is_allocated and not isinstance(reg.index, NoneAttr) and reg.index.data != 0
    )