Lower snitch
lower_snitch
¶
Rewrite patterns for lowering snitch → riscv.
SnitchStreamerDimension
dataclass
¶
Source code in xdsl/transforms/lower_snitch.py
SnitchStreamerMemoryMap
dataclass
¶
In the Snitch architecture, each streamer (a.k.a. data mover) is configured via a memory-mapped address space that can be written via custom riscv.scfgw (Stream ConFiGure Write) operation. For each streamer we have:
- Repeat: how many times a value should be repeated when popped from/pushed to a stream
- Dimensions: a list of supported streaming dimensions
For each dimension, the supported configuration parameters are:
- Bound
- Stride
- Source: base address when reading from a stream
- Destination: base address when writing to a stream
This table encodes the base addresses for each of the configuration parameters above.
Source code in xdsl/transforms/lower_snitch.py
csr: int = 1984
class-attribute
instance-attribute
¶
repeat: int = 1
class-attribute
instance-attribute
¶
dimension: tuple[SnitchStreamerDimension, ...] = (SnitchStreamerDimension(2, 6, 24, 28), SnitchStreamerDimension(3, 7, 25, 29), SnitchStreamerDimension(4, 8, 26, 30), SnitchStreamerDimension(5, 9, 27, 31))
class-attribute
instance-attribute
¶
__init__(csr: int = 1984, repeat: int = 1, dimension: tuple[SnitchStreamerDimension, ...] = (SnitchStreamerDimension(2, 6, 24, 28), SnitchStreamerDimension(3, 7, 25, 29), SnitchStreamerDimension(4, 8, 26, 30), SnitchStreamerDimension(5, 9, 27, 31))) -> None
¶
LowerSsrSetDimensionBoundOp
¶
Bases: RewritePattern
Source code in xdsl/transforms/lower_snitch.py
match_and_rewrite(op: snitch.SsrSetDimensionBoundOp, rewriter: PatternRewriter)
¶
Source code in xdsl/transforms/lower_snitch.py
LowerSsrSetDimensionStrideOp
¶
Bases: RewritePattern
Source code in xdsl/transforms/lower_snitch.py
match_and_rewrite(op: snitch.SsrSetDimensionStrideOp, rewriter: PatternRewriter)
¶
Source code in xdsl/transforms/lower_snitch.py
LowerSsrSetDimensionSourceOp
¶
Bases: RewritePattern
Source code in xdsl/transforms/lower_snitch.py
match_and_rewrite(op: snitch.SsrSetDimensionSourceOp, rewriter: PatternRewriter)
¶
Source code in xdsl/transforms/lower_snitch.py
LowerSsrSetDimensionDestinationOp
¶
Bases: RewritePattern
Source code in xdsl/transforms/lower_snitch.py
match_and_rewrite(op: snitch.SsrSetDimensionDestinationOp, rewriter: PatternRewriter)
¶
Source code in xdsl/transforms/lower_snitch.py
LowerSsrSetStreamRepetitionOp
¶
Bases: RewritePattern
Source code in xdsl/transforms/lower_snitch.py
match_and_rewrite(op: snitch.SsrSetStreamRepetitionOp, rewriter: PatternRewriter)
¶
Source code in xdsl/transforms/lower_snitch.py
LowerSsrEnable
¶
Bases: RewritePattern
Source code in xdsl/transforms/lower_snitch.py
match_and_rewrite(op: snitch.SsrEnableOp, rewriter: PatternRewriter)
¶
Source code in xdsl/transforms/lower_snitch.py
LowerSsrDisable
¶
Bases: RewritePattern
Source code in xdsl/transforms/lower_snitch.py
match_and_rewrite(op: snitch.SsrDisableOp, rewriter: PatternRewriter)
¶
Source code in xdsl/transforms/lower_snitch.py
LowerSnitchPass
dataclass
¶
Bases: ModulePass
Source code in xdsl/transforms/lower_snitch.py
name = 'lower-snitch'
class-attribute
instance-attribute
¶
__init__() -> None
¶
apply(ctx: Context, op: builtin.ModuleOp) -> None
¶
Source code in xdsl/transforms/lower_snitch.py
write_ssr_config_ops(reg: int, dm: int, value: Operand, comment: str | None = None) -> Iterable[Operation]
¶
Return the list of riscv operations needed to set a specific SSR configuration
parameter located at 'reg' to a specific 'value' for a specific data mover
identified by 'dm'.
To compute the actual address of the memory-mapped configuration parameter,
we have to compute:
address = dm + reg << 5
This value is then passed to riscv.scfgw to perform the actual setting.
Reference implementation in the snitch runtime library:
```C
inline void write_ssr_cfg(uint32_t reg, uint32_t dm, uint32_t value) {
asm volatile("scfgwi %[value], %[dm] | %[reg]<<5
" ::[value] "r"(value), [ dm ] "i"(dm), [ reg ] "i"(reg)); } ```